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Electrical Engineering UPSC PYQ 2023

5 questions from the UPSC 2023 examination.

5 questions

1Mediummains10 marks
Electrical Engineering

Write the state and output equations for the system shown in the figure. Choose state variables x₁ and x₂ as shown. Check the controllability and observability of the system. Differentiate between full decoding and partial decoding techniques used by 8085 microprocessor to decode an address. Give advantages and disadvantages of each technique. Discuss with example how BCD number addition is performed using DAA instruction of 8085 microprocessor. A 6600 V, 50 Hz, single-core, lead-sheathed cable has the following data:  Conductor diameter = 1·6 cm Length = 5 km Internal diameter of sheath = 3·2 cm Resistivity of insulation = 1·5 × 10¹² Ω-m Relative permittivity of insulation = 3·8 Calculate the insulation resistance, capacitance and the maximum electric stress in the insulation. Full decoding vs partial decoding in 8085; advantages and disadvantages. [10M] BCD addition using DAA instruction of 8085, with example. [10M] <!--qid:MAINS_2023_Electrical_Engineering-II_Q3-->

2Mediummains10 marks
Electrical Engineering

The figure shows a unity feedback system. The steady-state value of the unit step response c(t) is 0.8. Determine the maximum overshoot in the response c(t). A circuit breaker is rated as 2500 A, 1500 MVA, 33 kV, 3 sec, 3-phase, oil circuit breaker. Determine its rated normal current, breaking current, making current and short-time rating (current). An audio signal, whose bandwidth is 15 kHz, is to be digitized using PCM. Uniform quantization with 1024 levels and binary encoding are assumed. Determine the minimum sampling rate. If the actual sampling rate is 20 % in excess of the minimum rate, determine the minimum permissible bit rate. Briefly explain the following logical instructions of 8085 microprocessor: (i) ANA M (ii) XRA M (iii) CMC (iv) STC (v) RRC In a three-phase 400 km long transmission line, the conductors are spaced at the corners of an equilateral triangle of side 5 m. The diameter of each conductor is 3 cm. Calculate the capacitance per phase of the 400 km long conductor. <!--qid:MAINS_2023_Electrical_Engineering-II_Q1-->

3Mediummains20 marks
Electrical Engineering

The block diagram of a feedback system is shown in the figure. (i) Sketch the complete root locus of the system. (ii) What is the value of K at s = 0 ? (iii) Find the range of K for closed-loop stability. Draw the connection diagram of a Schering bridge to measure the capacitance and dissipation factor. Write the balance equations and derive the formulae for finding the capacitance and dissipation factor. A linear delta modulator is designed to transmit speech signal band-limited to 4 kHz. The specifications are:  sampling rate = 10 × Nyquist rate  step size = 100 mV The system is tested with a 1 kHz sinusoidal signal. Determine the maximum amplitude of the test signal so that slope overload does not occur. Calculate the maximum power that can be transmitted without slope overload. <!--qid:MAINS_2023_Electrical_Engineering-II_Q2-->

4Mediummains20 marks
Electrical Engineering

Consider a systematic linear block code with binary elements whose parity-check equations are  p₁ = m₁ + m₂ + m₃,  p₂ = m₂ + m₃ + m₄,  p₃ = m₁ + m₃ + m₄,  p₄ = m₁ + m₂ + m₄, where mᵢ are message digits and pᵢ are parity check digits. (i) Find the generator matrix and parity-check matrix for the code. (ii) How many errors can this code detect? How many errors can be corrected? (iii) If 10100100 is the received code word, find the corresponding transmitted code word assuming that single-bit error has been made during transmission. A transmission line has the following parameters:  A = D = 1∠25°, B = 88 ∠75° (i) Determine the sending-end voltage and the voltage regulation if the line supplies a load of 40 MW at 0.8 p.f. lagging with receiving-end voltage 132 kV. (ii) Find the power and power factor of the load if the voltages at the two ends are 132 kV and with a phase difference of 30°. Explain four instructions which are used to control interrupt structure of 8085 microprocessor. <!--qid:MAINS_2023_Electrical_Engineering-II_Q4-->

5Mediummains
Electrical Engineering

A bank of three identical single-phase transformers having 11000 V / 231 V voltage ratio are connected in delta-star combination with the delta side connected to 11 kV, 3-phase balanced supply. The star side is supplying a balanced load of 120 kVA at 0.8 pf lag. A single-phase load of 40 kW, upf is now connected between one line and neutral of the secondary side. Calculate the input line currents at the delta side under this condition. (Neglect any magnetising currents of the transformers) <!--qid:MAINS_2023_Electrical_Engineering-I_Q8-->

Electrical Engineering — All Years|All Subjects