<h3>Overview</h3>
<p>The <span class="key-term" data-definition="Special Economic Zone (SEZ) — A designated area with fiscal and regulatory incentives to promote export‑oriented manufacturing and services. (GS3: Economy)">Special Economic Zone (SEZ)</span> for semiconductor manufacturing has been notified at Dholera, Gujarat. The project, led by <strong>Tata Semiconductor Manufacturing Private Limited</strong>, will be India’s first <span class="key-term" data-definition="Semiconductor Fabrication — The process of creating integrated circuits on silicon wafers, a capital‑intensive activity crucial for technology self‑reliance. (GS3: Economy)">Semiconductor Fabrication</span> facility equipped with AI‑enabled capabilities.</p>
<h3>Key Developments</h3>
<ul>
<li>Notification dated <strong>9 April 2026</strong> for a 66.166‑hectare SEZ.</li>
<li>Projected investment of <strong>₹91,000 crore</strong> and direct employment of <strong>21,000</strong> persons.</li>
<li>Reduction of minimum land requirement from 50 ha to 10 ha under the amended <span class="key-term" data-definition="SEZ Rules, 2006 — The regulatory framework governing SEZs, recently amended to ease semiconductor‑specific norms. (GS3: Economy)">SEZ Rules, 2006</span>.</li>
<li>Flexibility in encumbrance norms, free‑of‑cost supplies counted in Net Foreign Exchange, and permission for domestic sales in the <span class="key-term" data-definition="Domestic Tariff Area (DTA) — The part of India where goods are sold domestically, subject to customs duties on imports. (GS3: Economy)">Domestic Tariff Area (DTA)</span> on payment of duties.</li>
<li>Parallel approvals for other semiconductor SEZs, including <strong>Micron Semiconductor Technology India Pvt Ltd</strong> (₹13,000 crore, 20,786 jobs) and several Karnataka and Gujarat projects.</li>
</ul>
<h3>Important Facts</h3>
<ul>
<li>Land area: 66.166 ha (≈ 163 acres).</li>
<li>Investment: ₹91,000 crore (≈ US$11 billion).</li>
<li>Employment: 21,000 direct, with ancillary indirect jobs.</li>
<li>Scope: AI‑enabled chip fabrication, assembly, testing, marking, and packaging.</li>
<li>Policy shift: Minimum land size cut to 10 ha, encouraging high‑value, capital‑intensive ventures.</li>
</ul>
<h3>UPSC Relevance</h3>
<p>These reforms illustrate the Government’s push for “Make in India” in high‑technology sectors, a recurring theme in <strong>GS III (Economy)</strong>. Understanding SEZ incentives, the strategic importance of semiconductor self‑reliance, and the role of AI in manufacturing helps answer questions on industrial policy, technology security, and employment generation. The amendments to the <span class="key-term" data-definition="SEZ Rules, 2006 — The regulatory framework governing SEZs, recently amended to ease semiconductor‑specific norms. (GS3: Economy)">SEZ Rules, 2006</span> also demonstrate how regulatory flexibility can attract foreign investment, a point relevant for questions on economic reforms.</p>
<h3>Way Forward</h3>
<p>Successful commissioning of the Dholera chip fab will require:</p>
<ul>
<li>Robust supply‑chain linkages with domestic silicon wafer producers.</li>
<li>Skill development programmes for high‑tech labour.</li>
<li>Continued policy support, including R&D incentives and export facilitation.</li>
<li>Monitoring of import‑substitution impact on the trade balance.</li>
</ul>
<p>If implemented effectively, the SEZ could position India among the top‑10 global semiconductor hubs, reducing dependence on imports and enhancing strategic autonomy.</p>
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