Skip to main content
Loading page, please wait…
HomeCurrent AffairsEditorialsGovt SchemesLearning ResourcesUPSC SyllabusPricingAboutUPSC AI ToolsUPSC AI ToolAI for UPSCUPSC ChatGPT

© 2026 Vaidra. All rights reserved.

PrivacyTerms
Vaidra Logo
Vaidra

Top 4 items + smart groups

UPSC GPT
New
Current Affairs
Daily Solutions
Daily Puzzle
Mains Evaluator

Version 2.0.0 • Built with ❤️ for UPSC aspirants

Loading...
Loading...
Loading...
Loading...
Loading...
Loading...
Loading...
Loading...
Loading...
Loading...
Loading...
Loading...
Loading...
Loading...
Loading...
Loading...
Loading...
Loading...
Loading...
Loading...
Loading...
Loading...
Loading...
Loading...
Loading...
Loading...
Loading...
Loading...

India Semiconductor Mission Phase‑II: ₹1.27 Lakh Crore Outlay to Boost Chipmaking & Strategic Self‑Reliance

The government has launched Phase‑II of the India Semiconductor Mission with a ₹1.27 lakh‑crore fund to expand chip manufacturing, offering larger subsidies and unit‑linked incentives. While advanced tools like EUV lithography remain out of reach, the policy aims to build domestic talent, reduce supply‑chain shocks, and position India strategically in the global semiconductor value chain.
Overview The government has announced the second phase of the India Semiconductor Mission with a massive corpus of ₹1.27 lakh crore . The fund will support the entire electronics manufacturing value chain, from design to assembly, aiming to make India a strategic hub for chips. Key Developments Higher outlay than Phase‑I, allowing larger capital subsidy and broader manufacturing‑linked incentives . Incentive boosters for products that use domestically made components, encouraging local sourcing. Focus on building human capital and intellectual property in areas where a few countries dominate. Recognition that advanced tools like EUV lithography remain out of reach, but the policy keeps the ambition alive. Linkage of semiconductor growth to future AI capabilities. Important Facts Phase‑II funding is more than double the first phase. The government’s share in the capital subsidy will be lower than the previous 50% share, encouraging private investment. Most projects approved in Phase‑I have not yet started commercial production, highlighting a lag between approval and output. India possesses a strong talent pool of semiconductor engineers, but risks losing them abroad without adequate domestic opportunities. Global competition for chip technology is intense; advanced economies are prepared to protect their lead through financial and strategic means. UPSC Relevance This development touches several GS‑3 themes: industrial policy, technology self‑reliance, and strategic security. Understanding the role of supply chain shocks is crucial for answering questions on economic resilience. The comparison with the Asian Tigers provides a benchmark for how technology‑led growth can transform an economy. Way Forward Accelerate commercialisation of Phase‑I projects to build early success stories. Strengthen R&D institutions and create industry‑academia linkages for EUV lithography and next‑generation chip design. Offer long‑term career pathways for semiconductor engineers to retain talent. Develop a clear roadmap for domestic production of critical equipment, reducing dependence on imports. Monitor global geopolitical shifts and align the semiconductor strategy with national security objectives.
Loading article...

Quick Reference

Key Insight

Phase‑II boosts India’s chip self‑reliance with a ₹1.27 lakh crore fund.

Key Facts

  1. ₹1.27 lakh crore allocated for Phase‑II of the India Semiconductor Mission (2026).
  2. Funding is more than double the Phase‑I outlay.
  3. Government’s share in capital subsidy reduced below the earlier 50% to attract private money.
  4. Incentive boosters reward products that use domestically made components.
  5. Phase‑II links chip growth to AI, talent creation and intellectual‑property development.
  6. Advanced tools like EUV lithography remain unavailable domestically, but the plan keeps the goal alive.
  7. Most Phase‑I projects have not yet started commercial production, showing a lag in implementation.

Background

Semiconductors are critical for defence, AI, telecom and many industries. Global supply‑chain shocks have shown the risk of dependence on a few countries. The mission therefore fits the UPSC syllabus on industrial policy, technology self‑reliance and strategic security.

UPSC Syllabus

  • GS2 — Government policies and interventions for development

Mains Angle

GS‑3 – Discuss how the India Semiconductor Mission Phase‑II reflects India’s industrial policy for strategic autonomy and what challenges must be addressed for successful implementation.

Explore:Current Affairs·Editorial Analysis·Govt Schemes·Study Materials·Previous Year Questions·UPSC GPT
  1. Home
  2. Prepare
  3. Current Affairs
  4. Schemes
  5. India Semiconductor Mission Phase‑II: ₹1.27 Lakh Crore Outlay to Boost Chipmaking & Strategic Self‑Reliance
GS388% Exam Relevance
Must Review
Login to bookmark articles
Login to mark articles as complete

Overview

Full Article

Overview

The government has announced the second phase of the India Semiconductor Mission with a massive corpus of ₹1.27 lakh crore. The fund will support the entire electronics manufacturing value chain, from design to assembly, aiming to make India a strategic hub for chips.

Key Developments

  • Higher outlay than Phase‑I, allowing larger capital subsidy and broader manufacturing‑linked incentives.
  • Incentive boosters for products that use domestically made components, encouraging local sourcing.
  • Focus on building human capital and intellectual property in areas where a few countries dominate.
  • Recognition that advanced tools like EUV lithography remain out of reach, but the policy keeps the ambition alive.
  • Linkage of semiconductor growth to future AI capabilities.

Important Facts

  • Phase‑II funding is more than double the first phase.
  • The government’s share in the capital subsidy will be lower than the previous 50% share, encouraging private investment.
  • Most projects approved in Phase‑I have not yet started commercial production, highlighting a lag between approval and output.
  • India possesses a strong talent pool of semiconductor engineers, but risks losing them abroad without adequate domestic opportunities.
  • Global competition for chip technology is intense; advanced economies are prepared to protect their lead through financial and strategic means.

Exam Relevance

This development touches several GS‑3 themes: industrial policy, technology self‑reliance, and strategic security. Understanding the role of supply chain shocks is crucial for answering questions on economic resilience. The comparison with the Asian Tigers provides a benchmark for how technology‑led growth can transform an economy.

Way Forward

  • Accelerate commercialisation of Phase‑I projects to build early success stories.
  • Strengthen R&D institutions and create industry‑academia linkages for EUV lithography and next‑generation chip design.
  • Offer long‑term career pathways for semiconductor engineers to retain talent.
  • Develop a clear roadmap for domestic production of critical equipment, reducing dependence on imports.
  • Monitor global geopolitical shifts and align the semiconductor strategy with national security objectives.
Read Original on hindu

Phase‑II boosts India’s chip self‑reliance with a ₹1.27 lakh crore fund.

Key Facts

  1. ₹1.27 lakh crore allocated for Phase‑II of the India Semiconductor Mission (2026).
  2. Funding is more than double the Phase‑I outlay.
  3. Government’s share in capital subsidy reduced below the earlier 50% to attract private money.
  4. Incentive boosters reward products that use domestically made components.
  5. Phase‑II links chip growth to AI, talent creation and intellectual‑property development.
  6. Advanced tools like EUV lithography remain unavailable domestically, but the plan keeps the goal alive.
  7. Most Phase‑I projects have not yet started commercial production, showing a lag in implementation.

Background & Context

Semiconductors are critical for defence, AI, telecom and many industries. Global supply‑chain shocks have shown the risk of dependence on a few countries. The mission therefore fits the UPSC syllabus on industrial policy, technology self‑reliance and strategic security.

UPSC Syllabus Connections

GS2•Government policies and interventions for development

Mains Answer Angle

GS‑3 – Discuss how the India Semiconductor Mission Phase‑II reflects India’s industrial policy for strategic autonomy and what challenges must be addressed for successful implementation.

Analysis

Related PYQs

No related PYQs linked to this article yet.

Practice Questions

GS3
Easy
Prelims MCQ

Semiconductor policy funding

1 marks
4 keywords
GS3
Medium
Mains Short Answer

Incentive structure and private participation

5 marks
4 keywords
GS3
Hard
Mains Essay

Strategic autonomy in high‑technology manufacturing

20 marks
5 keywords
Related:Daily•Weekly

Loading related articles...

Loading related articles...

Tip: Click articles above to read more from the same date, or use the back button to see all articles.