Overview On December 15 , the Ministry of Electronics and Information Technology (MEITY) announced the launch of DHRUV64 , an indigenous microprocessor. This development aims to strengthen the national indigenous processor pipeline and has potential applications ranging from consumer electronics to industrial automation. The initiative underscores India's push for technological self-reliance in critical sectors. Key Features of DHRUV64 Technical Specifications DHRUV64 is a fully indigenous microprocessor developed by the Centre for Development of Advanced Computing (C-DAC) under MEITY’s Microprocessor Development Programme . It is a general-purpose 64-bit, dual-core processor that runs at 1 GHz . These specifications suggest it is suitable for running operating systems and embedded deployment. Significance India heavily relies on imported processor designs and supply chains. The development of DHRUV64 aligns with the government's vision for a “homegrown processor technology”. Such processors are crucial for various applications, including telecom networks and industrial control systems. Controlling their design and supply chain enhances security and resilience during export controls or supply shocks. DHRUV64 in Context Performance Considerations While DHRUV64 is not designed for simple sensing or appliance logic, its performance is relatively low compared to top-tier consumer standards. Modern smartphones and laptops use processors with more CPU cores, higher clock speeds, and specialized units like GPUs. However, many contemporary computing applications, such as base station subsystems in telecommunications, industrial controllers, routers, and automotive modules, do not require top-of-the-line CPUs, prioritizing reliability and hardware-software integration. Challenges and Opportunities Established chipmakers already offer mature products with accompanying software and hardware development ecosystems in the fields DHRUV64 targets. To gain traction, DHRUV64 needs to offer compelling advantages to attract Indian electronics manufacturers. The processor is part of India’s ecosystem of processors, including SHAKTI from IIT-Madras , AJIT from IIT-Bombay , VIKRAM from the ISRO-Semiconductor Lab , and THEJAS64 from C-DAC (2025) . These processors address needs in strategic operations, control systems, spaceflight systems, and industrial automation. The Role of RISC-V Understanding RISC-V RISC-V (pronounced “risk five”) is an open instruction set architecture (ISA). An instruction set is a set of basic instructions that a processor understands. RISC-V's core rules are publicly available, allowing anyone to design a chip without paying a license fee for the instruction set itself. This contrasts with proprietary instruction sets controlled by companies, making RISC-V attractive to governments and research groups. DIR-V Program DHRUV64 is tied to the Digital India RISC-V (DIR-V) programme, which aims to build a portfolio of RISC-V -based microprocessors for industry, military, and consumer technologies. THEJAS32 was the first India-designed DIR-V chip to be fabricated, followed by THEJAS64 . DHRUV64 is the third on this list. Unanswered Questions Information Gaps The announcement of DHRUV64 lacks detailed engineering information needed to assess the chip’s readiness. Key aspects missing include benchmarks, memory subsystem details, input/output capabilities, and performance per watt. The statement mentions “modern architectural features” and “enhanced multitasking capability” without specifying what they entail. Furthermore, the claim that the chip is “fully indigenous” is ambiguous, particularly regarding the foundry, packaging, yields, and reliability targets. UPSC Relevance This development is relevant to GS3 (Science and Technology) , specifically concerning indigenization of technology and advancements in computing. It also touches upon GS2 (Government Policies and Interventions) related to promoting domestic manufacturing and technological self-reliance. Important Facts DHRUV64 is a 64-bit, dual-core microprocessor. It runs at 1 GHz . Developed by C-DAC under MEITY’s Microprocessor Development Programme . Part of the Digital India RISC-V (DIR-V) program. RISC-V is an open instruction set architecture. THEJAS32 was the first India-designed DIR-V chip to be fabricated. Launched on December 15 .